The present invention relates to sample and hold phase detectors and more particularly to digital sample and hold phase detectors.
Known sample and hold phase detectors used in phase locked loops and phase measuring applications are analog in nature. FIG. 1 shows an example of a prior art analog sample and hold phase detector employed in a phase-locked loop. The analog sample and hold phase detector 1 includes an analog ramp generator 2 responsive to the reference frequency to produce an analog ramp having a period equal to that of the reference frequency. The voltage controlled oscillator 3 produces an RF (radio frequency) output which is divided by N in a frequency divider 4. Under phase locked conditions, the output period of the divider 4 is equal to that of analog ramp produced at the output of generator 2. The output of divider 4 is formed into a narrow pulse which samples the voltage level of the analog ramp by means of, for instance, a semi-conductor switch which is shown schematically as a mechanical switch 5. The sample voltage is held by a holding capacitor 6 between samples. Under locked conditions, the voltage held in capacitor 6 is proportional to the phase difference between the RF output of oscillator 3 divided by N and the reference frequency. This voltage of capacitor 6 is amplified and integrated in amplifier-integrater 7 and fed back negatively to control the frequency of oscillator 3 to maintain phase lock.
N of divider 4, depending on the application, can be any number including one and fractions. When N is fractional, the phase locked frequency source assembly is often known as a "fractional division" or "fractional-N" frequency synthesizer. The output voltage of the sample and hold phase detector 1 will change somewhat in amplitude, causing a phase measurement error with temperature, with bias voltage variation and with aging. When used in a phase-locked loop, this error will be reflected in a phase change in the RF output of the oscillator 3. In some applications, the phase detector output voltage is used as an indication of phase offset between signal sources. Any detector non-linearities will cause a phase measurement error. The non-linearities are worse at high frequencies where it is difficult to generate a linear ramp. When the analog sample and hold phase detector 1 is used in a fractional division frequency synthesizer, non-linearities of a couple of per cent are capable of producing rather strong FM (frequency modulation) sidebands around the oscillator 3 operating frequency (carrier).